Faculty Publication

2023

1. Suman Sarkar, Papiya Debnath, Debashis De and Manash Chanda, “A DFT Based Approach to Sense the SF6 Decomposed Gases Using Ni-doped WS2 Monolayer”, IETE Technical Review, 18th Nov,  2023, doi.org/10.1080/02564602.2022.2143916

 

2. Suman Sarkar, Papiya Debnath, Debashis De and Manash Chanda, “ A DFT Based Approach for NO2  Sensing Using Vander wall Hetero Monolayer”, Accepted in IETE Journal of Research, Article ID:  TIJR 2181226, Taylor and Fracsis.

 

3. Adrija Mukherjee, Papiya Debnath, D. Nirmal, Manash Chanda, "A new analytical modelling of 10 nm negative capacitance-double gate TFET with improved cross talk and miller effects in digital circuit applications," Microelectronics Journal, 2023, 105689, ISSN 0026-2692, https://doi.org/10.1016/j.mejo.2023.105689.

 

4. Swapnadip De, Review of non conventional MOSFETs”, ISBN 978-620-6-16041--0, Publisher: Lambert Academic Publishing, Dudweiler Landstraße 9966123, Saarbrücken, Germany, www.lap-publishing.com, Publication date: 3/5/2023

 

5. M. Chanda, S. D. Patel, A. Bhattacharyya and S. Sahay, "Impact of Transport Mechanism on Binding Kinematics and Sensitivity of FET Biosensors," in IEEE Transactions on Electron Devices, doi: 10.1109/TED.2023.3281539.

 

6. A. Bhattacharyya, D. De and M. Chanda, "Ovarian-Cancer Biomarker (HE4) Recognition in Serum Using Hetero TFET Biosensor," in IEEE Transactions on Nanotechnology, vol. 22, pp. 238-244, 2023, doi: 10.1109/TNANO.2023.3272926.

 

7. Ganguly, S., Sengupta, J., Green Synthesis of Metal Oxide Nanoparticles, Springer, 26-Nov-2022, doi.org/ 10.1007/978- 3-030-69023- 6_91-1

 

8. Ganguly, S., Sengupta, J., Handbook of Nanofillers – Contribution: Graphene-based Nanofiller Fabrication: Opportunities and Challenges, Springer Nature (Manuscript accepted).

 

9. Ganguly, S., Sengupta, J., Medical Additive Manufacturing: Concepts and Fundamentals – Contribution: Graphene-based Nanocomposites in Additive Manufacturing, Elsivier (Manuscript accepted).

 

10. A. Bhattacharyya, D. De and M. Chanda,Temperature Imposed Sensitivity Issues of Hetero-TFET Based pH Sensor," in IEEE Transactions on NanoBioscience, vol. 22, no. 2, pp. 438-446,April 2023, doi: 10.1109/TNB.2022.3202242.

 

2022

1. “Design and Implementation of IoT-Enabled Innovative Smart Fan Operating on Real Feel Algorithm Suitable for Smart Homes”  by  Dogra, Sudip; Chowdhury, Pratik; Misra, Sinjini; Dhar, Swastik; Mukherjee, Srijeet; et al.  IUP Journal of Electrical and Electronics Engineering; Hyderabad Vol. 15, Iss. 3,  (Jul 2022): 42-52.

2. “Design and Implementation of IoT and AI enabled Innovative LPG Cylinder Monitoring System” by Dr.Sudip Dogra, Srijeet Mukherjee, Swastik Dhar, Pratik Chowdhury, Mr. Kamalendu Langal published at International Conference on Emerging allied technologies (ICGREAT) 2022held on 16th and 17thDecember 2022 at Sage University, Indore. Will be published in Joiurnal.

3. A. Bhattacharyya, D. De and M. Chanda, "Sensitivity Measurement for Bio-TFET Considering Repulsive Steric Effects With Better Accuracy," in IEEE Transactions on Nanotechnology, vol. 21, pp. 100-109, 2022, doi: 10.1109/TNANO.2022.3148922.

4. A. Bhattacharyya, D. De and M. Chanda, "Temperature Imposed Sensitivity Issues of Hetero-TFET Based pH Sensor," in IEEE Transactions on NanoBioscience, 2022, doi: 10.1109/TNB.2022.3202242

5. Amit Bhattacharya, Debasish De, and Manash Chanda, "Sensitivity Measurement for Bio-TFET Considering Repulsive Steric Effects With Better Accuracy," IEEE TNANO, (DOI: 10.1109/TNANO.2022.3148922 ).

6. Das, R., Chattopadhyay, A., Chanda, M. et al. "Analytical Modeling of Sensitivity Parameters Influenced by Practically Feasible Arrangement of Bio-Molecules in Dielectric Modulated FET Biosensor". Silicon (2022). DOI: https://doi.org/10.1007/s12633-021-01617-z.

 

7. T. Ganguli, M. Chanda, and A. Sarkar "Impact of Interface Trap Charges on the Performances of Junctionless MOSFET in Sub-Threshold Regime", Computers and Electrical Engineering, Volume 100, 2022, 107914, ISSN 0045-7906, https://doi.org/10.1016/j.compeleceng.2022.107914

 

8. G. Jana, D. Sen, P. Debnath and M. Chanda, "Power and delay analysis of dielectric modulated dual cavity Junctionless double gate field effect transistor based label-free biosensor", Computers and Electrical Engineering, Volume 99, 2022, 107828, ISSN 0045-7906. DOI: https://doi.org/10.1016/j.compeleceng.2022.107828

 

9. Mukherjee, M., Guha, S., Debnath, P. et al. "Analytical Modelling of Dopingless (DL) Impact Ionization MOSFET (IMOS)". Silicon (2022). https://doi.org/10.1007/s12633-022-01882-6.

 

10. Suman Sarkar, Papiya Debnath, Debashis De & Manash Chanda (2022) "A DFT Based Approach to Sense the SF6 Decomposed Gases Using Ni-doped WS2 Monolayer", IETE Technical Review, DOI: 10.1080/02564602.2022.2143916

 

11. Debarati Dey Roy, Pradipta Roy, Manash Chanda, Debashis De,"Ultra-low voltage adenine based gas sensor to detect H2 and NH3 at room temperature: First-principles paradigm" , International Journal of Hydrogen Energy, 2022, ISSN 0360-3199, https://doi.org/10.1016/j.ijhydene.2022.11.040.

 

12. Karmakar, Ananya & De, Arpan & Sen, Dipanjan & Chanda, Manash. (2022). "Design and Investigation of Double Gate Field Effect Transistor Based H2 Gas Sensor Using Ultra-Thin Molybdenum Disulfide". 10.21203/rs.3.rs-1611969/v1.

 

13. Ananya Karmakar, Adrija Mukherjee, Dipanjan Sen and Manash Chanda, "A junctionless dual-gate MOSFET-based programmable inverter for secured hardware applications using nitride charge trapping", Semicond. Sci. Technol., vol. 37, 115013, DOI 10.1088/1361-6641/ac92a3.

 

14. DC and Analog/RF Performance Comparison of Renovated GAA JLFET Structures Sudipta Ghosh;Abhiroop Jana;Agni Kumar Agnihotri;Shirsha Kundu;Dyuti Das;Subir Kumar Sarkar 2022 IEEE VLSI Device Circuit and System (VLSI DCS)

 

15. Impact of Trap Charge effects on the Performance of 2D material-based FET Sinjini Misra;Swastik Dhar;Ayush Sarkar;Swapnendu Sarkar;Anada Sankar Chakraborty;Swarnil Roy;Sudipta Ghosh 2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)

16. DC and Analog/RF Performance Analysis of Gate-Drain Underlapped and Channel Engineered TFET Sudipta Ghosh;Sayan Bose;Wahid Anwar;Madhusree Banerjee;P. Venkateswaran;Subir Kumar Sarkar 2022 IEEE VLSI Device Circuit and System (VLSI DCS)

 

17. Impact of Trap Charge effects on the Performance of 2D material-based FET Sinjini Misra;Swastik Dhar;Ayush Sarkar;Swapnendu Sarkar;Anada Sankar Chakraborty;Swarnil Roy;Sudipta Ghosh 2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)

 

18. A super Threshold Compact Silicon Neuron Circuit for Different Neuron Dynamics Suitable for Spiking Neural Network Sayantan Samanta;Koushik Naskar;Souvanik Pal;Suman Mallik;Sudipta Ghosh;Swarnil Roy 2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) 

 

2021

1.  Analysis of circuit performance of Ge-Si hetero structure TFET based on analytical model, Ghosh, S., Venkateswaran, P. and Sarkar, S.K., Circuit World, ISSN: 0305-6120. https://doi.org/10.1108/CW-08-2020-0175, 2021

2.  Analysis of Sub-Threshold Adiabatic Logic Model Using Junctionless MOSFET for Low Power Application, S. Roy, G. Jana, & M. Chanda, Silicon (2021). https://doi.org/10.1007/s12633-020-00870-y

3.  Arrhythmic Heartbeat Classification Using Ensemble of Random Forest and Support Vector Machine Algorithm, Shreya Bhattacharyya; Souvik Majumder; Papiya Debnath; Manash Chanda, IEEE Transactions on Artificial Intelligence 2021, 10.1109/TAI.2021.3083689

4.  Analytical modeling of Linearity and Intermodulation distortion of 3D Gate All Around Junctionless (GAA - JL) FET, Ankush Chattopadhyay, Manash Chanda, Chayanika Bose, C. K. Sarkar, Superlattices and Microstructures, 2021, https://doi.org/10.1016/j.spmi.2020.106788

5.  Analysis of Harmonic Distortions in GAA Junctionless FET using Analytical Model for reliable low power applications, Ankush Chattopadhyay, Manash Chanda, Chayanika Bose, C. K. Sarkar, Journal of Electronic Materials, Springer, 2021


2020

1.      Dipanjan Sen, Savio Sengupta, Manash Chanda, Swarnil.Roy (2020). Analysis of D.C Parameters of Short-Channel Heterostructure Double Gate Junction-Less MOSFET Circuits Considering Quantum Mechanical Effects. Silicon, Springer, DOI: 12. 10.1007/s12633-020-00507-0.

2.      Mainak Mukhrjee, Manash Chanda and Angsuman Sarkar and Anup Dey, “Effect of band non-parabolicity on energy sub-band profile for nano-dimensional MOSFET”, Journal of Microsystem Technologies, Springer, pp. 1-8, Feb, 2020. [SCI, Impact factor: 1.6] DOI: 10.1007/s00542-020-04761-5.

3.      Ruben Ray, Rahul Das and Manash Chanda, “Effect of fringing field capacitances in RF and small signal parameters of surrounding gate MOSFET Journal of Microsystem Technologies, Springer, Feb, 20120 . [SCI, Impact factor: 1.6], DOI: 10.1007/s00542-020-04765-1

4.      Amit Bhattacharyya;Adrija Mukherjee; Manash Chanda; Debashis De, “Advantages of Charge Plasma Based Double Gate Junctionless MOSFET Over Bulk MOSFET for Label Free Biosensing”, IEEE 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 18-19 July 2020, Kolkata, India.

5.      Adrija Mukherjee; Baishali Ray; Debankan Das; Shaon Bhattacharyya; Papiya Debnath and Manash Chanda, “Impact of Temperature on Circuit Performances of Junctionless MOSFET in Sub-threshold Regime”, IEEE 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 18-19 July 2020, Kolkata, India.

6.      S. Majumdar, S. Bhattacharya, P. Debnath and M. Chanda, “Power Delay Analysis of CMOS Reversible Gates for Low Power Application”, IEEE Compe 2020, will be included in IEEE, 2020.

7.      S. Chakraborty, D. Sen, S. J. Sengupta and S. Roy, "Evaluation of Selectivity and Sensitivity of Heterostructure Junction-Less DG-MOSFET Based Biosensor Considering Heating Effect," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 2020, pp. 374-377, doi: 10.1109/VLSIDCS47293.2020.9179950.

8.      S. Halder, R. Paul and S. Roy, "Design and Analysis of Bulk and Junctionless MOSFET Based Circuits for Low Power Applications," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 2020, pp. 1-5, doi: 10.1109/VLSIDCS47293.2020.9179929.

9.      M. Mukherjee, H. Saha and S. Roy, "Investigation of Comparator Architectures in 32 nm Silicon-On-Insulator(SOI) Technology," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 2020, pp. 34-37, doi: 10.1109/VLSIDCS47293.2020.9179914.

10.  Amit Bhattacharya, Manash Chanda and Debasish De “Analysis of Noise-Immune Dopingless Heterojunction Bio-TFET Considering Partial Hybridization Issue”, IEEE Transaction on Nanoelectronics, vol. 19, pp. 769 – 777, 26 Oct. 2020, DOI: 10.1109/TNANO.2020.3033966

11.  Amit Bhattacharyyya, Manash Chanda and Debashis De, “GaAs0.5Sb0.5/ In0.53Ga0.47As heterojunction dopingless charge plasma-based tunnel FET for analog/digital performance improvement”, Superlattices and Microstructures(Elsevier), Volume 142, June 2020, 106522 Impact Factor :2.117, doi.org/10.1016/j.spmi.2020.106522

12.  Avtar Singh, Saurabh Chaudhury, Manash Chanda and Chandan Kumar Sarkar, “Split gated silicon nanotube FET for bio-sensing applications”, IET Circuit, Device and System, 23rd Nov 2020, Early Access, DOI: 10.1049/iet-cds.2020.0208 .

13.  Swarnil Roy, Gargi Jana and Manash Chanda, “Analysis of Sub-Threshold Adiabatic Logic Model Using Junctionless MOSFET for Low Power Application”, Silicon, Springer Nature B.V. 2020, Accepted For Publication. DOI: http://dx.doi.org/10.1007/s12633-020-00870-y

14.  H. Banerjee, K. Sarkar, P. Debnath, S. Roy and M. Chanda, "Design and Analysis of Double Gate Tunnel Field Effect Transistor using Charged Plasma," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 2020, pp. 1-5, doi: 10.1109/VLSIDCS47293.2020.9179948.

15.  SharmiGanguly, Ravindra Jha, Prasanta K. Guha, Chacko Jacob. Synthesis of CuO Nanoflowers and Their Application Towards Inflammable Gas Sensing. (Journal of Electronic Materials, Volume 49, Issue 8, p.5070-5076, 2020).

16.  Sourav Guha, PrithvirajPachal, Sudipta Ghosh, Subir Kumar Sarkar,“Analytical model of a novel double gate metal-infused stacked gate-oxide tunnel field-effect transistor (TFET) for low power and high-speed performance”, Superlattices and Microstructures, Volume 146, 2020, ISSN 0749-6036, doi.org/10.1016/j.spmi.2020.106657.

17.  S. Ghosh, P. Pachal, R. Kumar, S. Kundu, J. Ghosh and S. K. Sarkar, "Performance enhancement of p-n-p-n TFET with spacer induced hetero-dielctric gate oxide" 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), Kolkata, India, 2020, pp. 1-5, doi: 10.1109/VLSIDCS47293.2020.9179943.

18.  S. Ghosh, S. Kundu, S. Guha, J. Ghosh, P. Pachal and S. K. Sarkar, "Effect of Body Thickness on Device Performance of Graded Channel Tri-Metal Double Gate Stack Gate TFET," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), Kolkata, India, 2020, pp. 427-431, doi: 10.1109/VLSIDCS47293.2020.9179899.

19.  S. Chakraborty, D. Sen, S. J. Sengupta and S. Roy, "Evaluation of Selectivity and Sensitivity of Heterostructure Junction-Less DG-MOSFET Based Biosensor Considering Heating Effect," 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 2020, pp. 374-377, doi: 10.1109/VLSIDCS47293.2020.9179950.

20.  Dipanjan Sen, Savio Sengupta, Manash Chanda, Swarnil.Roy (2020). Analysis of D.C Parameters of Short-Channel Heterostructure Double Gate Junction-Less MOSFET Circuits Considering Quantum Mechanical Effects. Silicon, Springer, DOI: 12. 10.1007/s12633-020-00507-0.

21.  Mainak Mukhrjee, Manash Chanda and Angsuman Sarkar and Anup Dey, “Effect of band non-parabolicity on energy sub-band profile for nano-dimensional MOSFET”, Journal of Microsystem Technologies, Springer, pp. 1-8, Feb, 2020. [SCI, Impact factor: 1.6] DOI: 10.1007/s00542-020-04761-5.

22.  Ruben Ray, Rahul Das and Manash Chanda, “Effect of fringing field capacitances in RF and small signal parameters of surrounding gate MOSFET Journal of Microsystem Technologies, Springer, Feb, 20120 . [SCI, Impact factor: 1.6], DOI: 10.1007/s00542-020-04765-1


2019

1. Arighna Basak, Manash Chanda and Angsuman Sarkar, “Drain current modelling of unipolar junction dual material double-gate MOSFET (UJDMDG) for SoC applications”, Journal of Microsystem Technologies, Springer, Nov, 2019, . [SCI, Impact factor: 1.6], doi.org/10.1007/s00542-019-04691-x

2. Dipanjan Sen, Savio Sengupta, Manash Chanda, Swarnil.Roy, “Analytical Modeling of D.C Parameters of Double Gate Junctionless MOSFET in Near & Subthreshold Regime for RF Circuit Application”, Nanoscience and Nanotechnology – Asia, Bentham Science, July-2019. DOI: 10.2174/2210681209666190730170031

3. Savio Jay Sengupta, Dipanjan Sen, Swarnil Roy, Manash Chanda, and Subir Kumar Sarkar , “D.C. Performance Analysis of High-K Adiabatic Logic Circuits in Sub-Threshold Regime for RF Applications”, Sensor Letter, American Scientific Publisher, vol. 17, pp. 487–496 (2019).

4. D.Sen, S.J .Sengupta, S.Roy, M.Chanda, S.K.Sarkar " D.C Performance Analysis of Sub-Threshold Source-Coupled Logic Circuit Using Double Gate Junction-Less MOSFET for Low-Power Application" Sensor Letter, American Scientific Publisher, 17, no. 7, pp. 538– 545, 2019.

5. Gargi Jana, Dipanjan Sen and Manash Chanda, “ Junctionless double gate non-parabolic variable barrier height Si-MOSFET for energy efficient application”, Journal of Microsystem Technologies, Springer, pp. Nov, 2019, . [SCI, Impact factor: 1.6], DOI: 10.1007/s00542-019-04688-6

6. Sen, Dipanjan& Sengupta, Savio & Roy, Swarnil & Chanda, Manash& Sarkar, Subir. (2019). Analytical Modeling of D.C Parameters of Double Gate Junctionless MOSFET in Near & Subthreshold Regime for RF Circuit Application. Nanoscience and Nanotechnology - Asia. 09. 10.2174/2210681209666190730170031.

7. Sengupta, Savio & Sen, Dipanjan& Roy, Swarnil & Chanda, Manash& Sarkar, Subir. (2019). D.C. Performance Analysis of High-K Adiabatic Logic Circuits in Sub-Threshold Regime for RF Applications. Sensor Letters. 17. 487–496. 10.1166/sl.2019.4102.

8. M. Sen, A. Gatait, S. Ghosh, M. Chanda and A. Sarkar, “Verilog-A Modeling of Junction-less MOSFET in Sub- Threshold Regime for Ultra Low-Power Application”, IEEE WITCON ECE 2019, will be included in IEEE.

9. Amit Bhattacharyya; PrithvirajPachal; Anirban Pradhan; Manash Chanda; Debashis De, “Performance Analysis of Underlap Double Gate Oxide Stacked Junctionless MOSFET for Analog and RF Applications”, IEEE 2019 International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW), 22-24 May 2019, DOI: 10.1109/IMICPW.2019.8933249

10. M. Sen, A. Gatait, S. Ghosh, M. Chanda, S. Roy and P. Debnath, "Verilog-A Modeling of Junction-less MOSFET in Sub- Threshold Regime for Ultra Low-Power Application," 2019 Women Institute of Technology Conference on Electrical and Computer Engineering (WITCON ECE), 2019, pp. 172-176, doi: 10.1109/WITCONECE48374.2019.9092930.

11. JoyantoRoychoudhary,Linear High Gain Dual Band Notch Scanning Beam Circularly Polarized Electronically Steerable Smart Antenna Array for2.4GHzW-lanand 5.8 GHz UHF RFID Reader Application Withoutany Central Null using Buttler-Matrix Beam-formerFormulation, International Journal of Scientific Research and Review. Volume 07, Issue 06, June2019. ISSN No.: 2279-543X.

12. Swarnil Roy; Sagar Mukherjee; ArkaDutta; Chandan Sarkar; Chayanika Bose “Circuit Performance Analysis of Graded Doping of Channel of DGMOS with High-k Gate Stack for Analog and Digital Application” in IET Circuits, Devices & Systems, vol. 13, no. 3, pp. 337-343, 5 2019, doi: 10.1049/iet-cds.2018.5199.

2018


1. Rahul Das, Manash Chanda, Chandan K Sarkar,“Analyticalmodeling of charge plasma based optimized nanogap embedded surrounding gate MOSFET for label free biosensing”,IEEE Transaction on Electron Device,vol. 65, issue 12, pp. 5487-5493, Oct 2018.( DOI: 10.1109/TED.2018.2872466) 

2. Gargi Jana, Madhuchhanda Majumdar Manash Chanda, Chandan K. Sarkar4, “Analysis of Gate misalignment Effects in Double Gate Junctionless MOSFET”, accepted in IEEE ICACCT 2018, pp. 122-125, India, (included in IEEE Xplore).

3. Savio Jay Sengupta, Samarthi Chakraborty, Tamal Sarkar, Md. Zishan Iqbal and Manas Chanda,”Effect of High -K Dielectric on the Performances of Adiabatic Logic Circuits in Sub -threshold Regime”, Accepted in IEEE EDKCON 2018,included in IEEE Explore.

4. Gargi Jana and Manash Chanda, “Analytical Modeling of Drain Current of Junctionless Double Gate Si - MOSFET having Variable BarrierHeight Considering Band Non -Parabolicity”, Accepted in IEEE EDKCON 2018, included in IEEE Explore.

5. Ruben Ray, Sagnik Ghoshal and Manash Chanda, “Small Signal Modeling of Cylindrical/Surrounding Gate MOSFET for RF Application Incorporating Fringing Effect”,Accepted in IEEE EDKCON 2018, included in IEEE Explore. 

6. D. Sen, S. J. Sengupta and S. Roy, "Study of Power Delay Characteristic of Subthreshold SCL Inverter Using Junction-Less DG-MOSFET," 2018 IEEE Electron Devices Kolkata Conference (EDKCON), Kolkata, India, 2018, pp. 455-460, doi: 10.1109/EDKCON.2018.8770417. 

7. Manash Chanda, Sandipta Mal, Akash Mondal, Chandan Kumar Sarkar "Design and Analysis of a Logic Model for Ultra Low Power Near Threshold Adiabatic Computing", IET Circuits Devices & Systems, vol. 12, issue 4, pp. 439-446, February 2018. (DOI: DOI: 10.1049/iet-cds.2017.0347).

8. Savio Jay Sengupta, Samarthi Chakraborty, Tamal Sarkar, Md. Zishan Iqbal and Manas Chanda,”Effect of High -K Dielectric on the Performances of Adiabatic Logic Circuits in Sub -threshold Regime”, Accepted in IEEE EDKCON 2018,included in IEEE Explore. 

9. Mainak Mukherjee, Manash Chanda, Anup Dey and AngsumanSarkar,”Effect of Band Parabolicity on Energy Sub -Band Profile for Nano - Dimensional Junctionless Metal Oxide Semiconductor Field Effect Transistors” Accepted in IEEE EDKCON 2018, included in IEEE Explore. 

10. “Design and implementation of highly secured arduino based voting machine” by Santosh Kumar Shaw, SashankPoddar,Vivek Singh and Sudip Dogra published in IEEE EDKCON 2018 held at The Pride Hotel, Kolkata, 24th -25th November,2018 .

11. “Design and Development of Automatic RFID based system for Identification and separation of plastic waste using near infrared reflectance spectroscopy” by Santosh Kumar Shaw, SashankPoddar,Vivek Singh and Sudip Dogra published in IEEE EDKCON 2018 held at The Pride Hotel, Kolkata, 24th -25th November,2018 .

12. “Infrared based sensor to prevent car and motor vehicle accidents” by N. Karmakar, A. Chatterjee, K. Langal and Sudip Dogra published in IEEE EDKCON 2018 held at The Pride Hotel, Kolkata, 24th -25th November,2018 .

13. “Access control management using password protected door and selective switching for electronic gadgets using RFID technology” by A. Pradhan, S. Sarkar, G.De, K. Langal  and Sudip Dogra published in IEEE EDKCON 2018 held at The Pride Hotel, Kolkata, 24th -25th November,2018 .

14. “Water level indicator and automatic tank controller system for domestic applicatins” by A. Hore, A. Mukherjee, A. Chatterjee, K. Langal and Sudip Dogra published in IEEE EDKCON 2018 held at The Pride Hotel, Kolkata, 24th -25th November,2018 .

15. S. Ghosh, S. Nath, R. Biswas, P. Venkateswaran, J. K. Sing and S. K. Sarkar, "PSO Variants and its Comparison with Firefly Algorithm in Solving VLSI Global Routing Problem," 2018 IEEE Electron Devices Kolkata Conference (EDKCON), Kolkata, India, 2018, pp. 513-518, doi: 10.1109/EDKCON.2018.8770397.

16. S. Mukherjee, A. Dutta, S. Roy and C. K. Sarkar, "Implementation of Low Power Programmable Flash ADC Using IDUDGMOSFET," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 7, pp. 844-848, July 2018, doi: 10.1109/TCSII.2017.2728619.

17. D. Sen, S. J. Sengupta and S. Roy, "Study of Power Delay Characteristic of Subthreshold SCL Inverter Using Junction-Less DG-MOSFET," 2018 IEEE Electron Devices Kolkata Conference (EDKCON), Kolkata, India, 2018, pp. 455-460, doi: 10.1109/EDKCON.2018.8770417.

18. D. Sen, B. Banik and S. Roy, "Power and Delay Analysis of Junction-Less Double Gate CMOS Inverter in Near and Sub-Threshold Regime," 2018 IEEE Electron Devices Kolkata Conference (EDKCON), Kolkata, India, 2018, pp. 367-372, doi: 10.1109/EDKCON.2018.8770468.

19. JoyantoRoychoudhary, Neeraj Kr., PushpenduKanjilalPHASED ARRAY ANTENNA ADAPTIVE BEAMFORMING FOR SPACE-TIME SIGNAL PROCESSING USING HYBRID GENETIC ALGORITHMS WITH MUTATION OPERATOR APPLIED TO RAYLEIGH FADING CHANNELS, International Journal of Electronics and Communication Engineering and Technology (IJECET). Vol. 3, Issue. 9, pp. 36-46, August – 2018 ISSN No: ISSN Print: 0976-6464 and ISSN Online: 0976-6472 © IAEME Publication.

20. JoyantoRoychoudhary,Neeraj Kr.,PushpenduKanjilalLinear Antenna Array Adaptive Beam forming For Space-Time Signal Processing Using Hybrid Genetic Algorithms Applied to Fading Channels, International Journal of Computer Engineering and Sciences Research. Vol. 01, Issue. 01, pp. 01-12, October – 2018. ISSN No: 0213-4465.

21. JoyantoRoychoudhary, ArindrajitChaudhury,Neeraj Kr. Smart Antenna Array Adaptive Beamforming for Space-Time Signal Processing Using Hybrid Ga-Pso Culled Mutation Operator Using A Novel Adaptive Equalizer Applied to Fading Channels, IEEE-ICIETS,Mysuru. September – 2018 ISBN No: ISSN-2349-5162

22. JoyantoRoychoudhary, Linear High Gain Dual Band Notch Scanning Beam Circularly Polarized Smart Antenna Array for 2.4 GHz and 5.8 GHz UHF RFID Reader Application Without any Central Null using Multi-Feed Orthogonal Buttler-Matrix Beam Former Formulation. In Scopus -ICME conference Warangal, Telangana. Sep -2018.

23. SharmiGanguly& Chacko Jacob. CuO nano flowers-Synthesis and gas sensor application. Proceedings of 29th Annual General Meeting of Materials Research Society of India And National Symposium on Advances in Functional and Exotic Materials. February, 2018. 

24. Swapnadip De, Mainak Bhattacharya, Aditi Kumari, Poulami Dutta, Ishita Gupta "Comparative study of Surface Potential for non conventional Double Gate MOSFETs", International Journal of VLSI Design and Technology, Journalspub, vol. 1, issue 1, pp. 1-19, 2018

25. Swapnadip De, Aditi Kumari, Poulami Dutta, Ishita Gupta, Mainak Bhattacharya, "A Review of Subthreshold Surface Potential for Single Gate Dual Material Double Halo MOSFET", International Journal of VLSI Design and Technology, Journalspub, vol. 2, issue 1, pp. 1-20, 2018, to be indexed in www.googlescholar.com




Books and Book Chapters

 

1. Amit Bhattacharyya, Manash Chanda and Debashis De, Dielectrically Modulated Bio-FET for Label-Free Detection of Bio-molecules, 2021, Modern Techniques in Biosensors.

2. M. Chanda, Design of Microcontroller Based Embedded Water Level Sensor, 2021, Lambert Academic Publishing.

3. M. Chanda, A. S. Chakrabarty, Reversible Logic Based Ultra Low Power Arithmetic Logic Circuit Design, 2021, Lambert Academic Publishing.

4. Swapnadip De, Manash Chanda, C K Sarkar, Channel And Gate Engineered Double Gate MOSFET, 2021, Lambert Academic Publishing.

5. Sudipta Ghosh, Manash Chanda, Chandan Kumar sarkar, Optical Switching Device Technology and Applications in Networks, 2021,Wiley.

6. Sudipta Ghosh, Manash Chanda, Papiya Debnath, Modeling of Heterojunction TFET using variable separation Method, 2021, CRC Press.

7. Swarnil Roy, Manash Chanda, Liquid Crystal Optical Switches, 2021,Wiley.

8. Swapnadip De, Crystallography, Band Structure and Density of States at Nanoscale, 2018, CRC Press.

9. A Sarkar, Swapnadip De, Manash Chanda, C. K. Sarkar, Low Power VLSI Design, 2016, DE GRUYTER.

10. Swapnadip De, Manash Chanda, Short Channel MOSFETs, 2016, Lambert Academic Publishing.

11.  Swapnadip De, Review of non conventional MOSFETs”, ISBN 978-620-6-16041--0, Publisher: Lambert Academic Publishing, Dudweiler Landstraße 9966123, Saarbrücken, Germany, www.lap-publishing.com, Publication date: 3/5/2023